The present invention relates to integrated circuits, and, more particularly, to a method for simulating an integrated circuit.
A very large scale integrated (VLSI) circuit cannot be considered to be purely digital because of the presence of analog functions, customized blocks, memories, etc. If a highly accurate simulation is required for checking timing, power levels, etc., then an electrical simulator should be used. Since electrical simulators require a very long execution time and can be applied only to relatively small circuits, it is necessary to use alternative methods for simulating VLSI circuits.
Digital simulators, which are an alternative to electrical simulators, are fast, can handle large circuits and provide good modeling capabilities, but they cannot take into account an analog behavior of the circuit. In contrast, electrical simulators are slow, highly accurate, take any signal into account, but cannot handle large and complex circuits because of their low speed.
A simulation is a simplified representation of a known electrical circuit. An electrical circuit is modeled using elements which describe its function. The more accurate the descriptions, the closer the results are to the known electrical circuit. Simulation of VLSI circuits can be formed using devices and connections which represent the actual components used by designers, and the millions of parasitic components correlated to the physical implementation of the circuit on the silicon wafer.
These devices are stimulated by a testing rig which represents the action external the circuit. For any device, a group of model equations are solved to calculate or predict responses of the circuit to the stimuli generated by the testing rig. Since these equations might be very complex and must be solved in short times, the processing speed of the central processing unit (CPU) may be inadequate.
An object of the present invention is to provide a method for the electrical dynamic simulation of VLSI circuits which combines the advantages of an electrical simulator with those of a digital simulator.
Another object of the present invention is to provide a method for the electrical dynamic simulation of VLSI circuits capable of providing the results of the simulation in a short time.
Another object of the present invention is to provide a method for the electrical dynamic simulation of VLSI circuits which operates in a parallel manner on various hardware devices.
Yet another object of the present invention is to provide a method for the electrical dynamic simulation of VLSI circuits which allows a reduced amount of memory to record the results with respect to known methods.
Another object of the present invention is to provide a method for the electrical dynamic simulation of VLSI circuits which allows a reduction in the simulation load affecting the CPU.
Yet a further object of the present invention is to provide a method for the electrical dynamic simulation of VLSI circuits which is highly reliable, relatively easy to provide and at competitive costs.
These objects and others which will become apparent hereinafter are achieved by a method for the electrical dynamic simulation of VLSI circuits, characterized in that it includes using a digital simulator and starting from a circuit to be simulated, the step of determining a plurality of independent subcircuits whose dimensions are equal to, or smaller than, those of the circuit. The method further includes the steps of electrically simulating each one of the subcircuits, and linking together the results obtained by the electrical simulations of the subcircuits.